Asic Implementation of a Data–push Architecture for Silicon Pixel Readout
نویسندگان
چکیده
A digitd circuit for reading out a sficon p~el array consisting of 64 x 256 elements has been designed. The readout architecture has a data-push sequencing with a throughput of about 200ns/hit. The critical demerits of this design have been fabricated through MOSIS using the HP 1.2pm doublemetd-single-polysficon process, Design det& of the ASIC and test resdts are presented. Measw.ementsof interfacetiects (metastabfity) between the analog and digitd circuit are dso presented.
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